TSMC Demos Next-Gen Chip Technology to Apple Ahead of 2025 Debut

Tuesday December 12, 2023 7:31 am PST by Hartley Charlton

TSMC has already demonstrated prototype 2nm chips to Apple ahead of their expected introduction in 2025, the Financial Times reports.

apple silicon 1 feature
Apple is said to be closely aligned with TSMC in the race to develop and implement 2nm chip technology, which will surpass their current 3nm chips and associated nodes in terms of transistor density, performance, and efficiency. 2nm chips are expected to be integral in underpinning future Apple silicon chips, as well as next-generation data center and artificial intelligence technology. Test results for TSMC's "N2" 2nm prototype chips have already been showcased to Apple and several other key TSMC clients as plans for upcoming chips begin to solidify.

In a separate report, DigiTimes points out that Apple is a key player in TSMC's battle against Samsung and Intel to bring 2nm chips to market, with no sign of the close relationship between the two companies waning. Apple reportedly has no plans to reduce its ‌3nm‌ or 2nm chip orders from TSMC before 2027 at the earliest.

Apple was the first company to utilize TSMC's ‌3nm‌ technology with the A17 Pro chip in the iPhone 15 Pro and iPhone 15 Pro Max, and the company is likely to follow suit with the chipmaker's N2 chips. TSMC's production of 2nm chips is slated to begin in 2025, with their first appearance in Apple devices likely to follow soon after.

Tags: Apple Silicon Guide, DigiTimes, Financial Times, TSMC

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Top Rated Comments

TheDailyApple

38 months ago

At this rate they‘ll have to start shrinking the atoms

Score: 21 Votes (Like | Disagree)

What's a computer?

38 months ago

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

Erm... no. According to the IEEE, the "2 nm" node anticipated for 2025 refers to a transistor size ranging from 12 nm to 45 nm. Features smaller than 12 nm aren't expected any time in the foreseeable future:
https://irds.ieee.org/editions/2021/more-moore
The IEEE is the Institute of Electrical and Electronics Engineers, and a reliable source.
Wikipedia says 45 nm, which may be the most relevant for CPUs:
https://en.wikipedia.org/wiki/2_nm_process
Edited to add: @oneMadRssn pointed out that the measures I cited above, such as "12 nm" and "45 nm", are technically the _gate_ sizes, which are smaller than the _entire_ transistor. Anyway, a feature 2 nm across would be 9 silicon atoms across, resulting in a device too unreliable to use at any temperature, even if manufacturing were perfect.

Score: 11 Votes (Like | Disagree)

Yvan256

38 months ago

Cue all the "My new M3 Mac that I haven't bought yet is already out of date" comments.

Score: 10 Votes (Like | Disagree)

oneMadRssn

38 months ago

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

Eh, 2nm is getting to the point of impossible if it means the entire transistor. A silicon atom is 0.13nm diameter. This would mean the entire transistor is 15 atoms wide. That's not technically impossible, but it's pretty darn close.

Also, not all transistors are the same size. A modern SoC will have dozens of different transistors types on it, of varying sizes. So measuring the smallest transistor doesn't really mean much if most of them are larger.

Rather, my understanding is that since about 65nm, TSMC has switched from measuring the size of the transistor to the width of the gate, or the width of the channel; which is a smaller subcomponent of the transistor. But having a gate width of 15 silicon atoms is more believable, since that means the entire transistor would be roughly twice as wide. And it tells you a bit more about the tech, since knowing the smallest feature size is still useful for the larger transistors on the die.

Score: 8 Votes (Like | Disagree)

Zest28

38 months ago

I can't tell if you're trying to be funny? The 2nm refers to the transistor width, and there are billions of transistors in such a chip. The 2nm measurement is accurate, not marketing.

2 nm don't actually refer to any physical dimension of the transistor. Its just a marketing term.

5nm from Samsung and 5nm TSMC are not the same at all, nor is 10nm from Intel vs 10nm from TSMC.

Intel was even trying to pass on their 10nm chips as "7nm" due to how TSMC defines it's nanometers.

Score: 8 Votes (Like | Disagree)

Sim2032

38 months ago

To build on some of the answers others have given, node procession as a numerical value really is a marketing exercise at this point. The underlying progression still generally refers to efficiency and to a lesser extent transistor count, but the technologies that get there aren't a simple shrinking anymore. Areas such as 3D packaging and all around the gate designs used to reduce leakage (and thus boost efficiency) are just some of the technologies involved.

Score: 6 Votes (Like | Disagree)

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TSMC Demos Next-Gen Chip Technology to Apple Ahead of 2025 Debut

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